This description relates to lithography mask creation for integrated circuits (ICs).
Lithography mask creation and printing assume that projection is done on a film, within a predetermined depth of focus range. However pattern dependencies between the process by which the ICs are fabricated and the pattern that is being created often cause processed films to have significant variation in thickness across a surface, resulting in variation in feature dimensions (e.g. line widths) of integrated circuits (ICs) that are patterned using the mask. As successive non-conformal layers are deposited and polished, the variation becomes worse. Because interconnect lines and connections on higher layers carry power to portions of the chip, the variations can increase the sheet resistance and thus affect the power effectiveness of the chip.
One way to reduce the variations in fabricated chips is to make physical measurements on manufactured wafers containing initial designs of devices and use these measurements to adjust the mask design. Other methods to reduce variation include optical proximity correction (OPC) where sub-wavelength distortions due to patterned features are identified and corrected.